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ds04-27242-1ea fujitsu microelectronics data sheet copyright?2006-2008 fujitsu microelectronics limited all rights reserved 2006.4 assp for power supply applications 5 ch dc/dc converter ic with synchronous rectification mb39a115 description the mb39a115 is a 5-channel dc/dc converter ic using pulse width modulation (pwm) , and the mb39a115 is suitable for up conversion, down conversion, and up/down converstion. the mb39a115 is built in 5 channels into tssop-38p/bcc-40p package and operates at 2 mhz maximum and, this ic can control and soft-start at each channel. the mb39a115 is suitable for power supply of high performance potable instruments such as a digital still camera (dsc). features ? supports for down-conversion with synchronous rectification (ch.1) supports for down-conversion and up/down zeta conversion (ch.2 to ch.4) supports for up-conversion and up/down sepic conversion (ch.5) low voltage start-up (ch.5) : 1.7 v power supply voltage range : 2.5 v to 11 v reference voltage : 2.0 v 1 % error amplifier threshold voltage : 1.0 v 1 % (ch.1) , 1.23 v 1 % (ch.2 to ch.5) oscillation frequency range : 200 khz to 2.0 mhz standby current : 0 a (typ) built-in soft-start circuit independent of loads built-in totem-pole type output for mos fet short-circuit detection capability by external signal ( ? ins terminal)
mb39a115 2 pin assignments (continued) cs2 ? ine2 fb2 dtc2 vcc ctl ctl3 ctl4 ctl5 ? ins vref rt ct gnd cscp dtc3 fb3 ? ine3 cs3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 cs1 ? ine1 fb1 vcco out1-1 out1-2 out2 out3 out4 out5 gndo cs5 ? ine5 fb5 dtc5 dtc4 fb4 ? ine4 cs4 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 top view (fpt-38p-m03)
mb39a115 3 (continued) dtc2 fb2 ? ine2 cs2 nc cs1 ? ine1 fb1 vcco 2 3 4 5 6 7 8 9 10 22 cscp dtc3 fb3 ? ine3 cs3 nc cs4 ? ine4 fb4 dtc4 34 18 33 19 20 35 32 14 15 16 17 11 12 13 31 21 out1-1 out1-2 out2 out3 out4 out5 gndo cs5 ? ine5 fb5 dtc5 38 37 36 14039 vcc ctl ctl3 ctl4 ctl5 ? ins vref rt ct gnd 30 29 28 27 26 25 24 23 top view (penetration diagram from surface) (lcc-40p-m07)
mb39a115 4 pin discriptions (continued) block name pin no. pin name i/o description tssop bcc ch.1 36 33 fb1 o error amplifier output terminal. 37 34 ? ine1 i error amplifier inverted input terminal. 38 35 cs1 ? soft-start setting capacitor connection terminal. 34 31 out1-1 o p-ch drive output terminal. (external main side fet gate driving) 33 30 out1-2 o n-ch drive output terminal. (external synchronous rectification side fet gate driving) . ch.2 4 40 dtc2 i dead time control terminal. 3 39 fb2 o error amplifier output terminal. 238 ? ine2 i error amplifier inverted input terminal. 137cs2 ? soft-start setting capacitor connection terminal. 32 29 out2 o p-ch drive output terminal. ch.3 16 12 dtc3 i dead time control terminal. 17 13 fb3 o error amplifier output terminal. 18 14 ? ine3 i error amplifier inverted input terminal. 19 15 cs3 ? soft-start setting capacitor connection terminal. 31 28 out3 o p-ch drive output terminal. ch.4 23 20 dtc4 i dead time control terminal. 22 19 fb4 o error amplifier output terminal. 21 18 ? ine4 i error amplifier inverted input terminal. 20 17 cs4 ? soft-start setting capacitor connection terminal. 30 27 out4 o p-ch drive output terminal. ch.5 24 21 dtc5 i dead time control terminal. 25 22 fb5 o error amplifier output terminal. 26 23 ? ine5 i error amplifier inverted input terminal. 27 24 cs5 ? soft-start setting capacitor connection terminal. 29 26 out5 o n-ch drive output terminal. osc 13 9 ct ? triangular wave frequency setting capacitor connection terminal. 12 8 rt ? triangular wave frequency setting resistor connection terminal.
mb39a115 5 (continued) block name pin no. pin name i/o description tssop bcc control 6 2 ctl i power supply control terminal. 7 3 ctl3 i ch.3 control terminal. 8 4 ctl4 i ch.4 control terminal. 9 5 ctl5 i ch.5 control terminal. 15 11 cscp ? short-circuit detection circuit capacitor connection terminal. 10 6 ? ins i short-circuit detection comparator inverted input terminal. power 35 32 vcco ? drive output block power supply terminal. 51vcc ? power supply terminal. 11 7 vref o reference voltage output terminal. 28 25 gndo ? drive output block ground terminal. 14 10 gnd ? ground terminal.
mb39a115 6 block diagram fb1 ? ine2 out2 osc 0.9 v 0.4 v power on/off ctl vr 1.23 v vref vcc bias 2.0 v ctl gnd cs2 fb2 dtc2 ? ine3 out3 cs3 fb3 dtc3 ? ine4 out4 cs4 fb4 dtc4 1 v ? ine5 cs5 fb5 dtc5 gndo out5 vref scp comp. ? ins cscp rt ct vref drive3 error amp3 pwm <> vref uvlo1 drive5 error amp5 pwm <> n-ch vref ? ine1 vcco out1-1 cs1 error amp1 1.0 v 1.23 v 1.23 v 1.23 v 1.23 v pwm comp.1 <> p-ch vref 10 a 10 a 1 a 1 a 1 a io = 300 ma at vcco = 7 v drive2 error amp2 pwm <> vref drive4 error amp4 pwm <> vref p-ch io = 300 ma at vcco = 7 v io = 300 ma at vcco = 7 v io = 300 ma at vcco = 7 v io = 300 ma at vcco = 7 v scp uvlo2 n-ch io = 300 ma at vcco = 7 v dead time dead time (td = 50 ns) out1-2 p-ch p-ch chctl ctl3 ctl4 ctl5 2 1 3 4 32 18 19 17 31 21 20 22 30 26 27 25 28 29 5 6 14 10 15 11 13 12 37 38 36 35 34 16 23 24 33 8 9 7 ? + + ? + + ? + + ? + + ? + + ? + ? + + ? + + ? + + ? + + ? + comp.2 comp.3 comp.4 comp.5 drive1-1 drive1-2 100 k ? l priority threshold voltage 1.0 v 1% l priority threshold voltage 1.23 v 1% l priority threshold voltage 1.23 v 1% l priority threshold voltage 1.23 v 1% threshold voltage 1.23 v 1% l priority h : release uvlo accuracy 0.8% error amp reference error amp power supply scp comp. power supply h : on (power on) l : off (standby mode) vth = 1.0 v l priority l priority l priority l priority h: at scp short-circuit detection signal (l : at short-circuit)
mb39a115 7 absolute maximum ratings *1 : when mounted on a 76 76 1.6 mm fr-4 boards. *2 : when mounted on a 117 84 0.8 mm fr-4 boards. warning: semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. recommended operating conditions * : refer to ? setting the triangular wave oscillation frequency?. parameter symbol condition rating unit min max power supply voltage v cc vcc, vcco terminals ? 12 v output current i o out1 to out5 terminals ? 20 ma peak output current i op out1 to out5 terminals duty 5 % (t = 1/f osc duty) ? 400 ma power dissipation p d ta + 25 c (tssop-38p) ? 1680* 1 mw ta + 25 c (bcc-40p) ? 1020* 2 mw storage temperature t stg ?? 55 + 125 c parameter symbol condition value unit min typ max start power supply voltage v cc vcc, vcco terminals (ch.5) 1.7 ? 11 v power supply voltage v cc vcc, vcco terminals (ch.1 to ch.5) 2.5 7 11 v reference voltage output current i ref vref terminal ? 1 ? 0ma input voltage v ine ? ine1 to ? ine5 terminals 0 ? v cc ? 0.9 v ? ins terminal 0 ? v ref v v dtc dtc2 to dtc5 terminals 0 ? v ref v control input voltage v ctl ctl, ctl3 to ctl5 terminals 0 ? 11 v output current i o out1 to out5 terminals ? 15 ?+ 15 ma oscillation frequency f osc * 0.2 1.0 2.0 mhz timing capacitor c t ? 27 100 680 pf timing resistor r t ? 3.0 6.2 39 k ? soft-start capacitor c s cs1 to cs5 terminals ? 0.1 1.0 f short-circuit detection capacitor c scp ?? 0.1 1.0 f reference voltage output capacitor c ref ?? 0.1 1.0 f operating ambient temperature ta ?? 30 + 25 + 85 c
mb39a115 8 warning: the recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. all of the device?s electrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating condition ranges. operation outside these ranges may adversely affect reliability and could result in device failure. no warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their representatives beforehand.
mb39a115 9 electrical characteristics (vcc = vcco = 7 v, ta = + 25 c) (continued) parameter symbol pin no. conditions value unit min typ max reference voltage block [vref] output voltage v ref1 11 vref = 0 ma 1.98 2.00 2.02 v v ref2 11 vcc = 2.5 v to 11 v 1.975 2.000 2.025 v v ref3 11 vref = 0 ma to ? 1 ma 1.975 2.000 2.025 v input stability line 11 vcc = 2.5 v to 11 v ? 2* ? mv load stability load 11 vref = 0 ma to ? 1 ma ? 2* ? mv temperature stability ? v ref / v ref 11 ta = 0 c to + 85 c ? 0.20* ?% short-circuit output current i os 11 vref = 0 v ?? 300* ? ma under voltage lockout protection circuit block (ch.1 to ch.4) [uvlo2] threshold voltage v th 34 vcc = 1.7 1.8 1.9 v hysteresis width v h 34 ? 0.05 0.1 0.2 v reset voltage v rst 34 vcc = 1.55 1.7 1.85 v under voltage lockout protection circuit block (ch.5) [uvlo1] threshold voltage v th 30 vcc = 1.35 1.5 1.65 v hysteresis width v h 30 ? 0.02 0.05 0.1 v reset voltage v rst 30 vcc = 1.27 1.45 1.63 v short-circuit detection block [scp] threshold voltage v th 15 ? 0.65 0.70 0.75 v input source current i cscp 15 ?? 1.4 ? 1.0 ? 0.6 a triangular wave oscilla- tor block [osc] oscillation frequency fosc 1 29 to 34 ct = 100 pf, rt = 6.2 k ? 0.95 1.0 1.05 mhz fosc 2 29 to 34 ct = 100 pf, rt = 6.2 k ? vcc = 2.5 v to 11 v 0.945 1.00 1.055 mhz frequency input stability ? f osc / f osc 29 to 34 ct = 100 pf, rt = 6.2 k ? vcc = 2.5 v to 11 v ? 1.0* ?% frequency temperature stability ? f osc / f osc 29 to 34 ct = 100 pf, rt = 6.2 k ? ta = 0 c to + 85 c ? 1.0* ?% soft-start block (ch.1, ch.2) [cs1, cs2] charge current i cs 1, 38 cs1, cs2 = 0 v ? 13 ? 10 ? 7 a soft-start block (ch.3 to ch.5) [cs3 to cs5] charge current i cs 19, 20, 27 cs3 to cs5 = 0 v ? 1.3 ? 1.0 ? 0.7 a
mb39a115 10 (vcc = vcco = 7 v, ta = + 25 c) (continued) parameter symbol pin no. condition value unit min typ max error amp block (ch.1) [error amp1] threshold voltage v th1 37 vcc = 2.5 v to 11 v ta = + 25 c 0.990 1.000 1.010 v v th2 37 vcc = 2.5 v to 11 v ta = 0 c to + 85 c 0.988 1.000 1.012 v temperature stability ? v th / v th 37 ta = 0 c to + 85 c ? 0.1* ?% input bias current i b 37 ? ine1 = 0 v ? 120 ? 30 ? na voltage gain a v 36 dc ? 100* ? db frequency bandwidth bw 36 a v = 0 db ? 1.4* ? mhz output voltage v oh 36 ? 1.7 1.9 ? v v ol 36 ?? 40 200 mv output source current i source 36 fb1 = 0.65 v ?? 2 ? 1ma output sink current i sink 36 fb1 = 0.65 v 150 200 ? a error amp block (ch.2 to ch.5) [error amp2 to error amp5] threshold voltage v th1 2, 18, 21, 26 vcc = 2.5 v to 11 v ta = + 25 c 1.217 1.230 1.243 v v th2 2, 18, 21, 26 vcc = 2.5 v to 11 v ta = 0 c to + 85 c 1.215 1.230 1.245 v temperature stability ? v th / v th 2, 18, 21, 26 ta = 0 c to + 85 c ? 0.1* ?% input bias current i b 2, 18, 21, 26 ? ine2 to ? ine5 = 0 v ? 120 ? 30 ? na voltage gain a v 3, 17, 22, 25 dc ? 100* ? db frequency bandwidth bw 3, 17, 22, 25 a v = 0 db ? 1.4* ? mhz output voltage v oh 3, 17, 22, 25 ? 1.7 1.9 ? v v ol 3, 17, 22, 25 ?? 40 200 mv output source current i source 3, 17, 22, 25 fb2 to fb5 = 0.65 v ?? 2 ? 1ma output sink current i sink 3, 17, 22, 25 fb2 to fb5 = 0.65 v 150 200 ? a
mb39a115 11 (continued) (vcc = vcco = 7 v, ta = + 25 c) * : standard design value note : the pin numbers referred are present on tssop-38p package. parameter symbol pin no. condition value unit min typ max pwm comparator block (ch.1 to ch.5) [pwm comp.1 to pwm comp.5] threshold voltage v t0 29 to 34 duty cycle = 0 % 0.35 0.4 0.45 v v t100 29 to 34 duty cycle = 100 % 0.85 0.9 0.95 v input current i dtc 4, 16, 23, 24 dtc = 0.4 v ? 2.0 ? 0.6 ? a output block (ch.1 to ch.5) [drive1 to drive5] output source current i source 29 to 34 duty 5 % (t = 1/f osc duty) out = 0 v ?? 300* ? ma output sink current i sink 29 to 34 duty 5 % (t = 1/f osc duty) out = 7 v ? 300* ? ma output on resistor r oh 29 to 34 out = ? 15 ma ? 918 ? r ol 29 to 34 out = 15 ma ? 914 ? dead time t d1 33, 34 out2 ? out1 ? 50* ? ns t d2 33, 34 out1 ? out2 ? 50* ? ns short-circuit detection block [scp comp.] threshold voltage v th 34 ? 0.97 1.00 1.03 v input bias current i b 10 ? ins = 0 v ? 25 ? 20 ? 17 a control block (ctl, ctl3 to ctl5) [ctl, chctl] output on condition v ih 6, 7 to 9 ctl, ctl3 to ctl5 1.5 ? 11 v output off condition v il 6, 7 to 9 ctl, ctl3 to ctl5 0 ? 0.5 v input current i ctlh 6, 7 to 9 ctl, ctl3 to ctl5 = 3 v 5 30 60 a i ctll 6, 7 to 9 ctl, ctl3 to ctl5 = 0 v ?? 1 a general standby current i ccs 5 ctl, ctl3 to ctl5 = 0 v ? 02 a i ccso 35 ctl = 0 v ? 01 a power supply current i cc 5ctl = 3 v ? 46ma
mb39a115 12 typical characteristics (continued) 0 1 2 3 4 5 ta = +25 c ctl = 3 v 01012 24 68 0 1 2 3 4 5 ta = +25 c ctl = 3 v vref = 0 ma 01012 24 68 1.95 1.96 1.97 1.98 1.99 2.00 2.01 2.02 2.03 2.04 2.05 ? 40 ? 20 0 20 40 60 80 100 vcc = 7 v ctl = 3 v vref = 0 ma 0.0 1.0 2.0 3.0 4.0 5.0 0 4 8 10 12 6 2 ta = +25 c vcc = 7 v vref = 0 ma 0 50 100 150 200 250 0481012 6 2 ta = +25 c vcc = 7 v power supply voltage v cc (v) power supply current vs. power supply voltage power supply current i cc (ma) power supply voltage v cc (v) reference voltage vs. power supply voltage reference voltage v ref (v) operaing ambient temperature ta ( c) reference voltage vs. operating ambient temperature reference voltage v ref (v) ctl terminal voltage v ctl (v) reference voltage vs. ctl terminal voltage reference voltage v ref (v) ctl terminal voltage v ctl (v) ctl terminal current vs. ctl terminal voltage ctl terminal current i ctl ( a)
mb39a115 13 (continued) 10 100 1000 10000 1 10 100 1000 ct = 27 pf ct = 100 pf ct = 220 pf ct = 680 pf ta = +25 c vcc = 7 v ctl = 3 v 10 100 1000 10000 10 100 1000 10000 rt = 2.4 k ? rt = 36 k ? rt = 13 k ? rt = 6.2 k ? ta = +25 c vcc = 7 v ctl = 3 v 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 1.10 1.20 0 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 ta = +25 c vcc = 7 v ctl = 3 v rt = 6.2 k ? upper limit lower limit 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 1.00 1.10 1.20 ? 40 ? 20 0 20 40 60 80 100 vcc = 7 v ctl = 3 v rt = 6.2 k ? ct = 100 pf upper limit lower limit 900 920 940 960 980 1000 1020 1040 1060 1080 1100 ? 40 ? 20 0 20 40 60 80 100 vcc = 7 v ctl = 3 v rt = 6.2 k ? ct = 100 pf timing resistor r t ( ? ) triangular wave oscillation frequency vs. timing resistor triangular wave oscillation frequency f osc (khz) timing capacity c t (pf) triangular wave oscillation frequency vs. timing capacity triangular wave oscillation frequency f osc (khz) triangular wave oscillation frequency f osc (khz) triangular wave upper and lower limit voltage vs. triangular wave oscillation frequency triangular wave upper and lower limit voltage v ct (v) operating ambient temperature ta ( c) triangular wave upper and lower limit voltage vs. operating ambient temperature triangular wave upper and lower limit voltage v ct (v) operating ambient temperature ta ( c) triangular wave oscillation frequency vs. operating ambient temperature triangular wave oscillation frequency f osc (khz)
mb39a115 14 (continued) 1 1.5 2 1 10 100 vctl = vcc ct = 100 pf ta = +25 c ta = ? 30 c 0 200 400 600 800 1000 1200 1400 1600 1800 2000 ? 40 ? 20 0 20 40 60 80 100 ? 40 ? 20 0 20 40 60 80 100 0 200 400 600 800 1000 1200 1400 1600 1800 2000 50 55 60 65 70 75 80 85 90 95 100 0.6 0.65 0.7 0.75 0.8 0.85 0.9 ta = +25 c vcc = 7 v ctl = 3 v fb = 2 v rt = 6.2 k ? ct = 100 pf calculating value measurement value ? 50 ? 40 ? 30 ? 20 ? 10 0 10 20 30 40 50 1 k 10 k 100 k 1 m 10 m ? 225 ? 180 ? 135 ? 90 ? 45 0 45 90 135 180 225 av + ? + + 37 38 36 2.0 v out 10 k ? 10 k ? 1 f in 240 k ? 2.4 k ? 1.0 v 1.5 v ta = +25 c vcc = 7 v power dissipation p d (mw) operating ambient temperature ta ( c) power dissipation vs. operating ambient temperature (for tssop-38p) operating ambient temperature ta ( c) power dissipation vs. operating ambient temperature (for bcc-40p) power dissipation p d (mw) timing resistor r t (k ? ) start power supply voltage vs. timing resistor start power supply voltage v cc (v) dtc terminal voltage v dtc (v) on duty vs. dtc terminal voltage on duty (%) frequency f (hz) error amp voltage gain, phase vs. frequency error amp voltage gain a v (db) phase (deg) error amp1 the same as other channels
mb39a115 15 functional description 1. dc/dc converter function (1) reference voltage block (vref) the reference voltage circuit uses the voltage supplied from the vcc terminal (pin 5) to generate a temperature compensated stable voltage (2.0 v typ) used as the reference voltage for the internal circuits of the ic. it is also possible to supply the load current of up to 1 ma to external circuits as a reference voltage through the vref terminal (pin 11) . (2) triangular wave oscillator block (osc) the triangular wave oscillator block generates the triangular wave oscillation waveform width with 0.4 v to 0.9 v by the timing resistor (r t ) connected to the rt terminal (pin 12) , and the timing capacitor (c t ) connected to the ct terminal (pin 13) . the triangular wave is input to the pwm comparator circuits on the ic. (3) error amplifier block (error amp1 to error amp5) the error amplifier detects output voltage of the dc/dc converter and outputs pwm control signals. an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the output terminal to inverted input terminal of the error amplifier, enabling stable phase compensation for the system. you can prevent surge currents when the ic is turned on by connecting soft-start capacitors to the cs1 terminal (pin 38) to cs5 terminal (pin 27) which are the noninverting input terminals of the error amplifier. the ic is started up at constant soft-start time intervals independent of the output load of the dc-dc converter. (4) pwm comparator block (pwm comp.1 to pwm comp.5) the pwm comparator block is a voltage-pulse width converter that controls the output duty depending on the input/output voltage. an external output transistor is turned on, during intervals when the error amplifier output voltage and dtc voltage is higher than the triangular wave voltage. (5) output block (drive1 to drive5) the output circuit uses a totem-pole configuration and is capable of driving an external p-ch mos fet (main side of ch.1, ch.2, ch.3 and ch.4) and n-ch mos fet (synchronous rectification side of ch.1 and ch.5).
mb39a115 16 2. channel control function use the ctl terminal (pin 6), cs1 terminal (pin 38), cs2 terminal (pin 1), ctl3 terminal (pin 7), ctl4 terminal (pin 8), and ctl5 terminal (pin 9) to set on/off to the main and each channels. on/off setting conditions for each channel note : note that current which is over stand-by current flows into vcc terminal when the ctl terminal is in ?l? level and one of the terminals between ctl3 to ctl5 terminals is set to ?h? level. (refer to ctl3 to ctl5 terminals equivalent circuit) ctl cs1 cs2 ctl3 ctl4 ctl5 power ch.1 ch.2 ch.3 ch.4 ch.5 l x x x x x off off off off off off h gnd gnd l l l on off off off off off h hiz gnd l l l on on off off off off h gnd hiz l l l on off on off off off h gnd gnd h l l on off off on off off h gnd gnd l h l on off off off on off h gnd gnd l l h on off off off off on h hiz hiz h h h on on on on on on gnd vcc 86 k ? ctl3 to ctl5 esd protection element 223 k ? 5 14 200 k ? ctl3 to ctl5 terminals equivalent circuit
mb39a115 17 3. protection function (1) timer-latch short circuit protection circuit (scp, scp comp.) the short-circuit detection comparator (scp) detects the output voltage level of each channel. if the output voltage of any channel is lower than the short-circuit detection voltage, the timer circuit is actuated to start charging to the capacitor (cscp) externally connected to the cscp terminal (pin 15). when the capacitor (cscp) voltage becomes about 0.7 v, the output transistor is turned off and the dead time is set to 100%. the short-circuit detection from external input is capable by using ? ins terminal (pin 10). when the protection circuit is actuated, the power supply is recycled or the ctl terminal (pin 6) is set to "l" level, resetting the latch as the voltage at the vref terminal (pin 11) becomes 1.27 v (min) or less (refer to ? setting the time constant for timer-latch short-circuit protection circuit?) . (2) under-voltage lockout protection circuit (uvlo) the transient state or a momentary decrease in the power supply voltage, which occurs when the power supply is turned on, may cause the control ic to malfunction, resulting in the breakdown or degradation of the system. to prevent such malfunctions, under-voltage lockout protection circuit detects a decrease in internal reference voltage level with respect to the power supply voltage, turns off the output transistor, and sets the dead time to 100% while holding the cscp terminal (pin 15) at the "l" level. the system returns to the normal state when the power supply voltage reaches the threshold voltage of the under-voltage lockout protection circuit. protection circuit operating function table the following table shows the state that the protection circuit is operating. operation circuit out1-1 out1-2 out2 out3 out4 out5 short-circuit protection circuit h lh h h l under voltage lockout protection circuit h lh h h l
mb39a115 18 setting the output voltage setting the triangular wa ve oscillation frequency the triangular wave oscillation frequency can be set by connecting a timing resistor (r t ) to the rt terminal (pin 12) and a timing capacitor (c t ) to the ct terminal (pin 13). triangular wave oscillation frequency : f osc f osc (khz) : = 620000 c t (pf) r t (k ? ) error amp 1 ? ine1 cs1 vo r1 r2 1.00 v ? + + 37 38 36 fb1 r3 ch.1 v o = 1.00 v (r1 + r2) r2 (r1 + r3) v o 100 a set r1 and r3 refer to above formula, then error amp?s response is not slow. error amp x ? inex csx vo r1 r2 1.23 v ? + + fbx r3 ch.2 to ch.5 x : each channel number v o = 1.23 v (r1 + r2) r2 (r1 + r3) v o 100 a set r1 and r3 refer to above formula, then error amp?s response is not slow.
mb39a115 19 setting the soft-start time to prevent rush currents when the ic is turned on, you can set a soft-start by connecting soft-start capacitors (c s1 to c s5 ) to the cs1 terminal (pin 38) to cs5 terminal (pin 27) respectively. as illustrated below, when each ctlx is set to ?l? from ?h?, ch.1 and ch.2 charge the soft-start capacitors (c s1 and c s2 ) externally connected to the cs1 and cs2 terminals at about 10 a. when each ctlx is set to ?h? from ?l?, ch.3 to ch.5 charge the soft-start capacitors (c s3 to c s5 ) externally connected to the cs3 to cs5 terminals at about 1 a. the error amplifier output (fb1 to fb5 terminals) is determined by comparison between the lower voltage of the two non-inverted input terminal voltage (1.23 v (ch.1 : 1.0 v) , cs terminal voltage) and the inverted input terminal voltage ( ? ine1 to ? ine5 terminal) . the fb terminal voltage is decided for the soft-start period (cs terminal voltage < 1.23 v (ch.1 : 1.0 v) ) by the comparison between ? ine terminal voltage and cs terminal voltage. the dc/dc converter output voltage rises in proportion to the cs terminal voltage as the soft-start capacitor externally connected to the cs terminal is charged. the soft-start time is obtained from the following formula : soft-start time : ts (time until output 100 % ) ch.1 : ts (s) : = 0.100 c sx ( f) ch.2 : ts (s) : = 0.123 c sx ( f) ch.3 to ch.5 : ts (s) : = 1.23 c sx ( f) ctlx fbx vo vref 10 a r2 r1 csx c sx ? inex 1.0 v/1.23 v error amp x ? + + l priority ? soft-start circuit (ch.1, ch.2) x : each channel number
mb39a115 20 ctlx chctl fbx vo vref 1 a r2 r1 csx c sx ? inex 1.23 v error amp x ? + + l priority ? soft-start circuit (ch.3 to ch.5) x : each channel number
mb39a115 21 processing when not using cs terminal when soft-start function is not used, leave the cs1 terminal (pin 38), the cs2 terminal (pin 1), the cs3 terminal (pin 19), the cs4 terminal (pin 20) and the cs5 terminal (pin 27) open. 27 cs5 38 cs1 20 cs4 19 cs3 1 cs2 when not setting soft-start time ?open? ?open? ?open? ?open? ?open?
mb39a115 22 setting the time constant for ti mer-latch short-circuit protection circuit each channel uses the short-circuit detection comparator (scp comp.) to always compare the error amplifier?s output level to the reference voltage. while dc/dc converter load conditions are stable on all channels, the short-circuit detection comparator output remains at ?l? level, and the cscp terminal (pin 15) is held at ?l? level. if the load condition on a channel changes rapidly due to a short-circuit of the load, causing the output voltage to drop, the output of the short-circuit detection comparator on that channel goes to ?h? level. this causes the external short-circuit protection capacitor c scp connected to the cscp terminal (pin 15) to be charged at 1 a. short-circuit detection time : t cscp t cscp (s) : = 0.70 c scp ( f) when the capacitor c scp is charged to the threshold voltage (v th : = 0.70 v) , the latch is set to and the external fet is turned off (dead time is set to 100 % ) . at this time, the latch input is closed and cscp terminal (pin 15) is held at ?l? level. the short-circuit detection from external input is capable by using ? ins terminal (pin 10) . in this case, the short- circuit detection operates when the ? ins terminal voltage becomes the level of the threthold voltage (v th : = iv) or less.
mb39a115 23 note that the latch is reset as the voltage at the vref terminal (pin 11) is decreased to 1.27 v (min) or less by either recycling the power supply or setting the ctl terminal (pin 6) to ?l? level. 1.1 v 1 a uvlo cscp s r latch ctl scp comp. 15 vref vo r1 r2 error amp 1.23 v (ch.1 : 1.0 v) ? inex fbx ? + ? + + to each channel drive timer-latch short-circuit protection circuit x : each channel number
mb39a115 24 processing when not using cscp terminal to disable the timer-latch short-circuit protection circuit, connect the cscp terminal (pin 15) to gnd in the shortest distance. 14 gnd 15 cscp processing when not using the cscp terminal
mb39a115 25 setting the dead time when the device is set for step-up or inverted output based on the step-up, step-up/down zeta method, step up/ down sepic method, or flyback method, the fb terminal voltage may reach and exceed the triangular wave voltage due to load fluctuation. if this is the case, the output transistor is fixed to a full-on state (on duty = 100%). to prevent this, set the maximum duty of the output transistor. when the dtc terminal is opened the maximum duty is 90% (typ) because of this ic built-in resistor which sets the dtc terminal voltage. to disable the dtc terminal, connect it to the vref terminal (pin 11) as illustrated below (when dead time is not set). to change the maximum duty using external resistors, set the dtc terminal voltage by dividing resistance using the vref voltage. refer to "when dead time is set : (setting by external resistors)." it is possible to set without regard for the built-in resistance value (including tolerance) when setting the external resistance value to 1/10 of the built-in resistance or less. note that the vref load current must be set such that the total current for all the channels does not exceed 1 ma. when the dtc terminal voltage is higher than the triangular wave voltage, the output transistor is turned on. the formula for calculating the maximum duty is as follows, assuming that the triangular wave amplitude and triangular wave lower limit voltage are about 0.5 v and 0.4 v, respectively. note : duty obtained by the above-mentioned formula is a calculated value. for setting, refer to ?on duty vs. dtc terminal voltage? in ? typical characteristics?. ? when dead time is set: (setting with built-in resistor : = 90 % ) x : each channel number ? when dead time is not set: x : each channel number duty (on) max : = vdt ? 0.4 v 100 ( % ) 0.5 v vdt = rb vref (condition : ra < r1 , rb < r2 ) ra + rb 10 10 dtcx ?open? dtcx vref 11
mb39a115 26 setting example (for an aim maximum on duty of 80 % (vdt = 0.8 v) with ra = 13.7 k ? and rb = 9.1 k ? ) ? calculation using external resistors ra and rb only ? calculation taking account of the built-in resistor (tolerance 20 % ) also based on (1) and (2) above, selecting external resistances of 1/10th or less of the built-in resistance enables the built-in resistance to be ignored. as for the duty dispersion, please expect 5 % at (fosc = 1 mhz) due to the dispersion of a triangular wave amplitude. vdt = rb vref : = 0.80 v ra + rb duty (on) max : = vdt ? 0.4 v 100 ( % ) : = 80 % ? ? ? ? (1) 0.5 v vdt = (rb, r2 combined resistance) vref : = 0.80 v 0.13 % (ra, r1 combined resistance) + (rb, r2 combined resistance) duty (on) max : = vdt ? 0.4 v 100 ( % ) : = 80 % 0.2 % ? ? ? ? (2) 0.5 v dtcx ra rb vdt r1 : 131.9 k ? r2 : 97.5 k ? gnd vref 11 14 ? when dead time is set : (setting by external resistors) to pwm comp.x x : each channel number
mb39a115 27 operation explanation when ctl turning on and off when ctl is turned on, internal reference voltage vr and vref generate. when vref exceeds each threshold voltage (vth1, 2) of uvlo1 and uvlo2 (under voltage lockout protection circuit) , uvlo1 and uvlo2 are released, and the operation of output drive circuit of each channel becomes possible. when ctl is off, vr and vref fall. when vref decreases and uvlo1 and uvlo2 fall below each reset voltage (vrst1, 2) , uvlo operates and output drive circuit of each channel is forcibly done the operation stop, and makes the output an off state. in the period until reaching to 2.0 v by vref voltage after uvlo1 and uvlo2 are released by turning on ctl (refer to a and b in ? ? timing chart?) and the period until decreasing of vref from 2.0 v after off ctl and operating of uvlo1 and uvlo2 (refer to a? and b? in ? ? timing chart?) , the bias voltage and the bias current in ic do not reach a prescribed value because vref which is the reference voltage does not reach 2.0 v, and the speed of response of ic has decreased. moreover, when in this period ic does the input sudden charge or the load sudden charge or turning on and off of ctl3 to ctl5, ic cannot conform and the output might overshoot. therefore, impress the voltage to ctl terminal by which the vref voltage never stays in the above-mentioned period. uvlo1 power on/off ctl vr 1.0 v/1.23 v vref bias ctl vref uvlo2 6 11 scp vcc 5 h : at scp h : uvlo release h : uvlo release error amp reference ch.1 to ch.4 to output drive circuit h : possible to operate l : forced stop cs1 to cs4 to charge/discharge circuit h : possible to charge l : forced discharge ch.5 to output drive circuit h : possible to operate l : forced stop cs5 to charge/discharge circuit h : possible to charge l : forced discharge ctl block equivalent circuit
mb39a115 28 vr = 1.23 v (typ) vref = 2.00 v (typ) uvlo1 to 4 a b a b uvlo5 vrst2 vrst1 vth2 vth1 1.1 0.2 v (typ) error amp reference voltage vr reference voltage vref ch.5 output drive circuit control ch.1 to ch.4 output drive circuit control ctl terminal voltage uvlo5 effect uvlo1 to uvlo4 effect fixed full off fixed full off uvlo5 release uvlo1 to uvlo4 release possible operate possible operate fixed full off fixed full off ? timing chart
mb39a115 29 about the low voltage operation 1.7 v or more is necessary for the vcc terminal (pin 5) and the vcco terminal (pin 35) for the self-power supply type to use the step-up circuit as the start voltage. even if thereafter vin voltage decreases to 1.5 v, operation is possible if the vcc terminal voltage and the vcco terminal voltage rise to 2.5 v or more after start-up. however, it is necessary not to exceed the maximum duty set value by the duty due to the vin decrease. including other channels, execute an enough operation margin confirmation when using it. error amp5 ? ine5 cs5 r1 r2 1.23 v drive5 <> n-ch a vo5 (5 v) a vref vcc vcco vin pwm comp.5 0.9 v 0.4 v dtc5 ? + + ? + + r4 r5 out5 35 29 5 26 27 24 step-up max duty setting
mb39a115 30 i/o equivalent circuit (continued) 1.23 v vcc 11 vref gnd 124 k ? 79 k ? 5 14 + ? 6 gnd 53 k ? ctl 278 k ? gnd 86 k ? ctlx 223 k ? vcc csx gnd vref (2.0 v) 15 cscp gnd vref (2.0 v) 2 k ? vref (2.0 v) vcc gnd ? ins 10 100 k ? (1 v) 0.64 v 12 rt gnd vref (2.0 v) + ? gnd vref (2.0 v) 13 ct vref (2.0 v) vcc gnd fbx csx 1.0 v (ch.1) ? inex 1.23 v (ch.2 to ch.5) x : each cannel no. ? reference voltage block ? channel control block (ch.3 to ch.5) esd protection element ? control block ? soft-start block ? short-circuit detection block ? short-circuit detection comparator block ? triangular wave oscillator block (rt) ? triangular wave oscillator block (ct) ? error amplifier block (ch.1 to ch.5) esd protection element esd protection element
mb39a115 31 (continued) outx gndo vcco 35 28 vcc gnd dtcx fb2 to fb5 ct x : each cannel no. ? output block (ch.1 to ch.5) ) ? pwm comparator block
mb39a115 32 application example vo3 3.3 v/200 ma c q4 d3 l3 22 h c5 1 f c6 2.2 f dvo4 5.0 v/100 ma d q5 d4 l4 47 h c7 1 f c8 2.2 f fb1 ? ine2 out2 vin vcc ctl gnd b cs2 fb2 dtc2 ? ine3 out3 c cs3 fb3 dtc3 ? ine4 out4 d cs4 fb4 dtc4 ? ine5 e cs5 fb5 dtc5 gndo out5 ? ins cscp rt ct vref e tvo5-1 15 v/40 ma tvo5-3 ? 15 v/ ? 10 ma ? ine1 vcco out1-1 vo1 1.2 v/600 ma a cs1 a out1-2 vo2 2.5 v/400 ma b ctl3 ctl4 ctl5 2 1 3 4 32 18 19 17 31 21 20 22 30 26 27 25 28 29 5 6 14 10 15 11 13 12 37 38 36 35 34 16 23 24 33 8 9 7 q1 q2 q3 q7 d1 d2 d7 d9 l1 4.7 h l2 10 h c1 1 f c2 2.2 f c3 1 f c4 2.2 f c12 1 f c13 2.2 f c15 2.2 f c16 0.1 f c17 t2 r14 510 ? r15 4.3 k ? r16 24 k ? r17 1 k ? c18 1.5 f r18 510 ? r19 15 k ? r20 15 k ? r21 1 k ? c20 1.5 f r24 3.3 k ? r25 22 k ? r26 15 k ? c19 0.1 f c21 0.1 f c23 0.1 f r27 1 k ? c22 0.15 f r30 3 k ? r31 43 k ? r32 15 k ? r33 1 k ? c24 0.15 f c25 0.1 f r36 12 k ? r37 100 k ? r38 10 k ? r39 1 k ? c26 0.15 f c27 0.1 f c28 2200 pf c29 100 pf c30 0.1 f r42 6.2 k ? <> <> <> <> <> r41 20 k ? r40 33 k ? (5.5 v to 8.5 v) h : on l : off vth = 1.0 0.1 f short-circuit detection signal (l : at short-circuit) transformer step down (synchronous rectification) step down step down charge current 1 a accuracy 5% (2.0 mhz) accuracy 1 % h : on (power on) l : off (standby state) vth = 1.0 v step down
mb39a115 33 parts list notes : sanyo : sanyo electric co., ltd. tdk : tdk corporation sumida : sumida corporation ssm : susumu co., ltd. component item specification vendor parts no. q1, q3 to q5 q2, q7 p-ch fet n-ch fet vds = ? 20 v, id = ? 1.0 a vds = 30 v, id = 1.4 a sanyo sanyo mch3307 mch3408 d1 to d4 d7, d9 diode diode vf = 0.4 v (max) , at if = 1 a vf = 0.55 v (max) , at if = 0.5 a sanyo sanyo sbs004 sb05-05cp l1 l2 l3 l4 inductor inductor inductor inductor 4.7 h 10 h 22 h 47 h 1.4 a, 37 m ? 0.94 a, 56 m ? 0.63 a, 130 m ? 0.59a, 210 m ? tdk tdk tdk tdk rlf5018t-4r7m1r4 rlf5018t-100mr94 rlf5018t-220mr63 slf6028t-470mr59 t2 transformer ?? sumida clq52 5388-t139 c1, c3, c5, c7 c2, c4, c6, c8 c12 c13, c15 c16, c17, c19 c18, c20 c21, c23, c25 c22, c24, c26 c27, c30 c28 c29 ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser ceramics condenser 1 f 2.2 f 1 f 2.2 f 0.1 f 1.5 f 0.1 f 0.15 f 0.1 f 2200 pf 100 pf 25v 25v 25v 25v 50v 10v 50v 16v 50v 50v 50v tdk tdk tdk tdk tdk tdk tdk tdk tdk tdk tdk c3216jb1e105k c3216jb1e225k c3216jb1e105k c3216jb1e225k c1608jb1h104k c2012jb1a155k c1608jb1h104k c1608jb1c154k c1608jb1h104k c1608jb1h222k c1608ch1h101j r14, r18 r15 r16 r17, r21, r27 r19, r20, r26 r24 r25 r30 r31 r32 r33, r39 r36 r37 r38 r40 r41 r42 resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor resistor 510 ? 4.3 k ? 24 k ? 1 k ? 15 k ? 3.3 k ? 22 k ? 3 k ? 43 k ? 15 k ? 1 k ? 12 k ? 100 k ? 10 k ? 33 k ? 20 k ? 6.2 k ? 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm rr0816p-511-d rr0816p-432-d rr0816p-243-d rr0816p-102-d rr0816p-153-d rr0816p-332-d rr0816p-223-d rr0816p-302-d rr0816p-433-d rr0816p-153-d rr0816p-102-d rr0816p-123-d rr0816p-104-d rr0816p-103-d rr0816p-333-d rr0816p-203-d rr0816p-622-d
mb39a115 34 reference data (continued) 70 75 80 85 90 95 100 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 ta = + 25 c vo1 = 1.2 v, 600 ma vo2 = 2.5 v, 400 ma vo3 = 3.3 v, 200 ma vo4 = 5.0 v, 100 ma vo5-1 = 15 v, 40 ma vo5-3 = ? 15 v, ? 10 ma fosc = 1 mhz setting 70 75 80 85 90 95 100 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 ch.1 ch.4 ch.2 ch.3 ch.5 ta = + 25 c vo1 = 1.2 v, 600 ma vo2 = 2.5 v, 400 ma vo3 = 3.3 v, 200 ma vo4 = 5.0 v, 100 ma vo5-1 = 15 v, 40 ma vo5-3 = ? 15 v, ? 10 ma fosc = 1 mhz setting total efficiency vs. input voltage input voltage v in (v) total efficiency ( % ) each channel efficiency vs. input voltage input voltage v in (v) each channel efficiency ( % ) note : only concerned channel is on. including external sw tr driving current
mb39a115 35 (continued) 60 65 70 75 80 85 90 95 100 0 50 100 150 200 250 300 350 400 450 500 550 600 ch.1 ch.2 vin = 7.2 v ta = + 25 c i o 1 (ch.1) 120 ma: discontinuance mode i o 2 (ch.2) 100 ma: discontinuance mode 60 65 70 75 80 85 90 95 100 0 50 100 150 200 250 300 350 400 ch.3 ch.4 vin = 7.2 v ta = + 25 c i o 3 (ch.3) 50 ma: discontinuance mode i o 4 (ch.4) 30 ma: discontinuance mode note : only concerned channel is on. including external sw tr driving current ch.1 and ch.2 efficiency vs. load current load current i o (ma) ch.1 and ch.2 efficiency ( % ) ch.3 and ch.4 efficiency vs. load current load current i o (ma) ch.3 and ch.4 efficiency ( % ) note : only concerned channel is on. including external sw tr driving current
mb39a115 36 (continued) 60 65 70 75 80 85 90 95 100 0 102030405060 ch.5 vin = 7.2 v ta = + 25 c i o 5-1 30 ma: discontinuance mode notes only feedback controlling output is get by using transformer channel. tv o 5-3 ( 15 v): i o = 10 ma fixed only concerned channel is on. including external sw tr driving current ch.5 efficiency vs. load current load current i o (ma) ch.5 efficiency ( % )
mb39a115 37 (continued) 10 5 0 10 5 0 10 5 0 0 0.05 0.10 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 out1-2 [v] out1-1 [v] t [ s] vd [v] ch.1 vin = 7.2 v vo1 = 1.2 v lo1 = 600 ma 10 5 0 10 5 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 out2 [v] t [ s] vd [v] ch.2 vin = 7.2 v vo2 = 2.5 v lo2 = 400 ma t 10 5 0 10 5 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 t [ s] out3 [v] vd [v] ch.3 vin = 7.2 v vo3 = 3.3 v lo3 = 200 ma t switching waveform
mb39a115 38 (continued) 10 5 0 10 5 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 out4 [v] t [ s] vd [v] t ch.4 vin = 7.2 v vo4 = 5 v lo4 = 100 ma 10 5 0 10 5 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 out5 [v] t [ s] vd [v] ch.5 vin = 7.2 v vo5-1 = 15 v vo5-3 = ? 15 v io5-1 = 40 ma lo5-3 = ? 10 ma 15
mb39a115 39 usage precautions ? printed circuit board ground lines should be set up with consideration for common impedance. ? take appropriate static electricity measures. containers for semiconductor materials should have anti-static protection or be made of conductive material. after mounting, printed circuit boards should be stored and shipped in conductive bags or containers. work platforms, tools, and instruments should be properly grounded. working personnel should be grounded with resistance of 250 k ? to 1 m ? between body and ground. ? do not apply a negative voltages. the use of negative voltages below ? 0.3 v may create parasitic transistors on lsi lines, which can cause abnormal operation. ordering information part number package remarks mb39a115pft 38-pin plastic tssop (fpt-38p- m03) MB39A115PV2 40-pin plastic bcc (lcc-40p-m07)
mb39a115 40 package dimensions (continued) 38-pin plastic tssop lead pitch 0.50 mm package width package length 4.40 9.70 mm lead shape gullwing sealing method plastic mold mounting height 1.10 mm max 38-pin plastic tssop (fpt-38p-m03) (fpt-38p-m03) c 2002 fujitsu limited f38003sc-1-1 0.1270.05 (.005.002) 9.700.10(.382.004) 4.400.10 6.400.10 (.252.004) (.173.004) 0.10(.004) 0.50(.020) 0.100.10 (.004.004) (.024.004) 0.600.10 0.25(.010) index 1.10(.043) 0.900.05 (.035.002) 9.00(.354) 0~8? max dimensions in mm (inches). note: the values in parentheses are reference values.
mb39a115 41 (continued) 40 -pin plastic bcc lead pitch 0.50 mm package width package length 6.0 0 mm 6.0 0 mm sealing method plastic mold mounting height 0.8 0 mm max weight 0.05 g 40 -pin plastic bcc (lcc- 40 p-m0 7 ) (lcc-40p-m07) c 2004 fujitsu limited c40057s-c-1-1 1 11 31 21 0.500.10 (.020.004) 0.50(.020) typ 4.00(.157) ref 5.25(.207) ref "b" "c" "a" 5.25(.207)ref 0.500.10 (.020.004) 0.50(.020) typ 5.10(.201)typ 5.20(.205)typ 0.80(.031)max 0.0750.025 (.003.001) 11 21 31 1 6.000.10(.236.004) (stand off) 6.000.10 (.236.004) 0.05(.002) details of "b" part 0.550.06 (.022.002) 0.550.06 (.022.002) (mount height) index area details of "a" part (.028.002) 0.700.06 (.012.002) 0.300.06 c0.20(.008) details of "c" part (.022.002) 0.550.06 (.022.002) 0.550.06 0.14(.006) min 0.600.06 (.024.002) 4.00(.157)ref 5.20(.205) 5.10(.201) typ typ 0.14(.006) min dimensions in mm (inches). note: the values in parentheses are reference values.
mb39a115 42 memo
mb39a115 43 memo
fujitsu microelectronics limited shinjuku dai-ichi seimei bldg. 7-1, nishishinjuku 2-chome, shinjuku-ku, tokyo 163-0722, japan tel: +81-3-5322-3347 fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ for further information please contact: north and south america fujitsu microelectronics america, inc. 1250 e. arques avenue, m/s 333 sunnyvale, ca 94085-5401, u.s.a. tel: +1-408-737-5600 fax: +1-408-737-5999 http://www.fma.fujitsu.com/ europe fujitsu microelectronics europe gmbh pittlerstrasse 47, 63225 langen, germany tel: +49-6103-690-0 fax: +49-6103-690-122 http://emea.fujitsu.com/microelectronics/ korea fujitsu microelectronics korea ltd. 206 kosmo tower, 1002 daechi-dong, kangnam-gu,seoul 135-280 korea tel: +82-2-3484-7100 fax: +82-2-3484-7111 http://www.fmk.fujitsu.com/ asia pacific fujitsu microelectronics asia pte ltd. 151 lorong chuan, #05-08 new tech park, singapore 556741 tel: +65-6281-0770 fax: +65-6281-0220 http://www.fujitsu.com/sg/services/micro/semiconductor/ fujitsu microelectronics shanghai co., ltd. rm.3102, bund center, no.222 yan an road(e), shanghai 200002, china tel: +86-21-6335-1560 fax: +86-21-6335-1605 http://cn.fujitsu.com/fmc/ fujitsu microelectronics pacific asia ltd. 10/f., world commerce centre, 11 canton road tsimshatsui, kowloon hong kong tel: +852-2377-0226 fax: +852-2376-3269 http://cn.fujitsu.com/fmc/tw all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with sales representative s before ordering. the information, such as descri ptions of function and applicati on circuit examples, in this docum ent are presented solely for t he purpose of reference to show examples of ope rations and uses of fujits u microelectronics device; fujitsu microelectronics does not warrant proper operation of the device with respect to use based on such information. when you develop equipment incor porat- ing the device based on such in formation, you must assume any responsibility arising out of such use of the information. fujitsu microelectronics assumes no liab ility for any damages whatsoever arisi ng out of the use of the information. any information in this document, including descriptions of function and schematic di agrams, shall not be construed as license of the use or exercise of any intellectual property ri ght, such as patent right or copyright, or any other right of fujitsu microelectroni cs or any third party or does fujitsu microel ectronics warrant non-infringeme nt of any third-party's intellectual property right o r other right by using such information. fu jitsu microelectronics assumes no liability for any infringement of the intellectual property rights or other rights of third parties which w ould result from the use of in formation cont ained herein. the products described in this document are designed, developed and manufa ctured as contemplated fo r general use, including wit hout limitation, ordinary indus trial use, general office use, personal use, and household use, but are not designed, developed and m anufactured as contemplated (1) for use acco mpanying fatal risks or dangers th at, unless extremely high safety is secured, could have a ser ious effect to the public, and could lead directly to death, personal injury, severe physical damage or other lo ss (i.e., nuc lear reaction control in nuclear facility, airc raft flight control, air traffic c ontrol, mass transport control, me dical life support system, missile la unch control in weapon system), or (2) for use requiring extremely high re liability (i.e ., submersible repeater and artificial satellite). please note that fujitsu microelectronics will not be liable against you and/or any th ird party for any clai ms or damages arisi ng in connection with above-men tioned uses of the products. any semiconductor devices have an inherent ch ance of failure. you must protect against injury, damage or loss from such failure s by incorporating safety desi gn measures into your facility and equipment such as redundancy, fire protection, and prevention of ov er-current levels and other abnor mal operating conditions. exportation/release of any products described in this docum ent may require necessary procedures in accordance with the regulati ons of the foreign exchange and foreign trade control law of japan and/or us export control laws. the company names and brand na mes herein are the trademarks or registered trademarks of their respective owners. edited strategic business development dept.

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